The week's pick
Reseach Article
Low Power Asynchronous UP Counter using CNTFET
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 51 - Number 2 |
| Year of Publication: 2012 |
| Authors: V. Saravanan, V. Kannan |
10.5120/8015-1229
|
V. Saravanan, V. Kannan . Low Power Asynchronous UP Counter using CNTFET. International Journal of Computer Applications. 51, 2 ( August 2012), 25-29. DOI=10.5120/8015-1229
Abstract
In many applications counter is used to divide input clock to produce output, the frequency of the output is the divide by N times of the input clock frequency. Due to these reasons ripple counters can be used as frequency dividers to reduce a high clock frequency down to a more usable value for use in digital clocks and timing applications. In many applications such as ultra low power digital circuits, nano devices, wireless communication etc, designing of low power asynchronous counter is highly desirable. This paper presents the low power asynchronous counter using carbon nanotube field effect transistor, As far as it is known, this is the first attempt to design asynchronous counter using CNTFET. Results of the design are compared with CMOS technology based asynchronous counter.
References
- Appenzeller J (2008), “Carbon Nanotubes for High-Performance Electronics Progress and Prospect”, Proceedings of the IEEE, Vol. 96, No. 2, pp. 201-211.
- Postma H, Teepen T, Yao Z et al. (2001), “Carbon Nanotube Single-Electron Transistors at Room Temperature”, Science, Vol. 293, No. 5527, pp. 76-79.
- Radosavljevic M et al. (2003), “Drain Voltage Scaling in Carbon Nanotube Transistors” Appl. Phys. Lett., Vol. 83, No. 12, p. 2435-2437.
- Pecchia A et al. (2003), “Electronic Transport Properties of Molecular Devices”, Physical Review Letters, Vol. 19,pp. 139-144.
- Kyung Ki Kim,Yong-Bin Kim, Ken Choi (2011),“Hybrid CMOS and CNFET Power Gating in Ultralow VoltageDesign” IEEE Transactions on Nanotechnology, Vol. 10, No. 6, Pp 1439-1448
- Li J, Zhang Q, Yan Y et al. (2007), “Fabrication of Carbon Nanotube Field-Effect Transistors by Fluidic Alignment Technique”, IEEE Transactions on Nano- Technology, Vol. 6, No. 4, pp. 481-484.
- Bachtold A, Hadley P, Nakanishi T and Dekker (2001), “Logic Circuits with Carbon Nanotube Transistors”, Science, Vol. 294, No. 9, pp. 1317-1320
- Chen Z, Appenzeller J, Lin Y-M et al. (2006), “An Integrated Logic Circuit Assembled on a Single Carbon Nanotube”, Science, Vol. 311, No. 5768, p. 1735.
- Rahman A, Jing Guo, Datta S and Lundstrom M S (2003), “Theory of Ballistic Nanotransistors”, IEEE Transactions on Electron Devices, Vol. 50, No. 10, pp. 1853-1864’
- Raychowdhury A and Roy K (2005), “Carbon Nanotube Based Voltage-Mode Multiple-Valued Logic Design”, IEEE Trans. Nanotechnology, Vol. 4, No. 2, pp. 168-179.
- Han J and Jonker P (2002), “A System Architecture Solution for Unreliable Nanoelectronic Devices”, IEEE Trans. Nanotechnology,Vol.1, pp. 201-208.
- Heinze S et al. (2002), “Carbon Nanotubes as Schottky Barrier Transistors”, Physical Review Letters, Vol. 89.
- Ian O’Connor, Junchen Liu, etal (2007)“CNTFET Modeling and Reconfigurable Logic-Circuit Design” IEEE Transactions on Circuits and Systems, Vol. 54, No. 11, pp 2365-2379
- Khairul Alam, Roger Lake,l (2007) “Role of Doping in Carbon Nanotube Transistors With Source/Drain Underlaps”IEEE Transactions on Nanotechnology,Vol.6,
- Youngki Yoon, James Fodor, and Jing Guo,(2008) “A Computational Study of Vertical Partial-Gate Carbon-Nanotube FETs ” IEEE Transactions on Electron Devices,Vol.55,No
- J. Liu, I. O’Connor, D. Navarro, F. Gaffiot (2007) “Design of a Novel CNTFET-based Reconfigurable Logic Gate” IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07)
- Jie Deng, H.-S. Philip Wong (2007) “A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application Model of the Intrinsic Channel Region” IEEE Transactions on Electron Devices,Vol. 54, No. 12, Pp 3186-3194
- Deji Akinwande, Yoshio Nishi,and H.-S. Philip Wong, (2008) “An Analytical Derivation of the Density of States, Effective Mass, and Carrier Density for Achiral Carbon Nanotubes” IEEE Transactions On Electron Devices, Vol. 55, No. 1, Pp 289 – 297
- Jie Deng, H.-S. Philip Wong,(2007) “A Compact SPICE Model for Carbon- Nanotube Field-Effect Transistors Including Nonidealities and Its Application ”IEEE Transactions On Electron Devices, Vol. 54, No. 12, Pp 3195 – 3205
- Arijit Raychowdhury, Saibal Mukhopadhyay, and Kaushik Roy (2004) “Circuit-Compatible Model of Ballistic Carbon Nanotube Field- Effect Transistors” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 23, No. 10, pp 1411 – 1420
Index Terms
Keywords